Charles sturt university Computer architecture and organisation Student name : ANUGU VINOD KUMAR Student ID : 11560727 Assignment no. : 1 Table of contents :
1.Question………………………………..page no. 2
2. Question………………………..page no. 3
3. Question……………………………….page no. 3 - 7
4. Question……………………………….page no. 7 - 8
5.Question………………………………...page no. 8 - 10
6. Question………………………………..page no. 10 – 11 References………………………………page no. 12 - 13
1.
Von Neumann architecture : this architecture consists of internal components of the computer and they are input devices , central processing unit, output devices and the memory unit. Whenever the inputs are given through the input devices the values goes to the accumulator in the central processing unit and the CPU passess these data or values to the memory unit for the storage and the memory unit hold these data values or programs. Where the control unit passess these data or program values from the memory to the accumulator and it can also hold the instructors for the program execution. It can hold only one value at a time means that the control unit cannot hold more values than one because it leads to override the values in the control unit. Once it withdraw a value from the unit then it asks for the memory unit to pass another value and it sends to the accumulator. This process is also known as serial or sequential processing machine. Once the values are reached to the arithmetic logical unit this bus sends the data to the accumulator after performing the required basic operations like addition , sub, multiplication , division then the accumulator sends the data values or program values as output to the end user or user and the arithmetic logical unit also perform operation like lessthan and greater than. All these process is known as von Neumann architecture. The issues with the von Neumann architecture is that the data can be send only though the single bus which is widespread and the output or the processor speed is limited in the von Neumann architecture . The central processing unit does not have any work or idle for sometime due limited speed of the processor . This is to be reffered as von Neumann bottleneck.
Von Neumann bottleneck: von Neumann bottleneck has came up from the von Neumann architecture which is due to the fact that a common shared multiplex bus is used to get in instructions and all data . so in this process at some point the processor or the things have to wait which results in processor being idle for sometime hence a faster central processing unit no longer turns into fast computer . This waiting of data to be fetched or read get instructions is increased so, to avoids such scenarios the use of independent instructions and data caches are being used. Which allows frequently used instructions and data to be stored in two separate high speed memories and available to processor through independent bus. However this is not a full fledged final solution but it does minimise latency and increase output and processor speed. To overcome von Neumann bottleneck we have to redesign the computers and processor of von Neumann architecture.
2.
Moore’s law : it states that the density of transistors on integrated circuits or the silicon chips are doubled every year and then he estimated that the chips are doubled every 18months or two years but it cannot be hold more than ten years is known as Moore’s law. The speed of the computer should not exceed than the available limit. The limit exists that if the transistor is created smaller than the atomic particle then the speed of the control processor unit cannot be increased due to the space occupied by the transistor. The transistor and computers chips are varied from size due to high clock rate, and the signal cannot be travelled fast because its travelling for one
