The processor generates the necessary timing signals to fetch the next instruction from the memory system. The program counter holds the address of next instruction to fetch. The processor then fetches instruction from memory location. The memory address register stores the memory location which data will be fetched to the CPU or the location which data will be sent and stored. The memory places a “copy” of the instruction on the data Bus, processor copies instruction to the instruction register. The data bus is used to transfer data between processor and memory system/peripheral devices. The instruction register stores the fetched instruction. The processor interprets instruction and performs required actions. The memory buffer register holds the data being transferred to and from the immediate access storage. The CPU copies the data from the data bus into its MBR. The CPU copies the data from the MBR to the instruction register; this is where the fetch instructions are held. Finally, the processor interprets these instructions and performs necessary actions, ready for the next stage of the cycle to